09:00-09:50 Registration/welcome coffee / Vendor Fair
09:50-10:00 Opening Video + Welcome Speech
10:00-10:50 Keynote I: Dr. Walden Rhines, Chairman & CEO, Mentor Graphics- Merger Mania
10:50-11:40 Keynote II: Suk Lee, Sr. Director, TSMC - Technology Directions in the FinFET Era
11:40-11:50 Break-out session Introduction : Russell Lee, PacRim Technical Director, Mentor Graphics
11:50-13:00 Lunch / Vendor Fair

 Step 1 - 勾選你的議程時段(同一時段課程只能勾選一堂)
TRACK Track 1
IC Design
Track 2
IC Design & Test
Track 3
Functional Verification/ P&R
Track 4
AMS/ Support/ PCB & Package
Calibre Overall Solutions at TSMC Advanced Nodes
Co-Presented by TSMC: Peter Hsu
Silicon Diagnosis and Yield Analysis in the FinFET Era
Enterprise Verification: Productivity from Formal - Simulation – Emulation
Accurate nm Circuit Verification and Device Noise Analysis of Analog/Mixed-Signal ICs
Competing in Reliability Focused Growth Markets with Calibre PERC
Saving Time and Cost of your FinFET Designs Through Truly Integrated Hierarchical DFT Solution
Co-Presented by Spreadtrum: Kenneth Huang
Veloce - the Technology Leader in Emulation
How to Customize and Further Leverage your Calibre Licenses
14:30-14:50 Coffee Break / Vendor Fair
Calibre: We've Already Got you Covered for 10nm
The Internet of Things(IoT) and Increased Design Complexity in Established Nodes
EZ Design and Verification of AMBA® Based Designs
Co-Presented by ARM: David Hsu
Optimized Co-design of an IC / Package / PCB System
Meeting New Extraction Challenges at Advanced Nodes and Advanced Designs
DRC-Clean Cell Design in 30 minutes- Qualcomm's Experience with Calibre RealTime
Presented by Qualcomm: Tom Williams
Project Nitro – Mentor’s Next Generation Place and Route System
Accelerated, Accurate Electromagnetic Modeling of IC Packages
16:20-16:30 Closing Comment / Lucky Draw